With the design trend in electronic devices is toward lighter, smaller, thinner but more functional devices with performance requirements continuing to increase, device manufacturers increasingly need specialty integrated circuit (IC) solutions for allowing billions of miniature electronic components to be densely packed in a small area. Thus, device manufacturers come up with innovative packaging techniques for embedding electronic components in a substrate while allowing shorter traces between the electronic components and the substrate. In addition, the layout area is increased by the use of built-up technique as the technology advances for achieving lighter, smaller, thinner and more functional high-performance devices.
Generally, most high-end chips are packaged by flip chip (FC) process, especially by a chip scale package (CSP) process, as those high-end chips are primarily being applied in smart phones, tablet computers, network communication devices, and notebook computers, whichever is generally operating under high-frequency and high-speed condition and required to be packed in a thin, small and light-weighted semiconductor package. As for the carrier for packaging, the popular design nowadays includes: small pitches between lines, high density, thin-type design, low manufacture cost, and high electrical characteristic.
Please refer to FIG. 1, which shows a conventional fiberglass substrate packaging structure. In FIG. 1, the fiberglass substrate packaging structure 10A has a fiberglass substrate 100A, which is formed with a groove 110A and a plurality of via holes 120A by a laser via method. In addition, the groove 110A can be used for receiving and holding an electronic component 130A, while a portion of the plural via holes 120A can be provided for receiving a conductive metal pillar 140A. As shown in FIG. 1, the two first conductive metal layers 142A, 144A are respectively disposed on the fiberglass substrate 100A while allowing the two to connected electrically to the conductive metal pillar 140A; the groove 110A and the electronic component 130A are covered and sealed by an insulation layer 150A, whereas the electronic component 130A, the plural via holes 120A, two second conductive metal layers 146A, 148A to be disposed on the insulation layer 150A while being connected electrically to the electronic component 130A and the two first conductive metal layers 142A, 144A.
However, the aforesaid conventional fiberglass substrate packaging structure is disadvantageous in that: it can be very costly for using a fiberglass substrate as its substrate in addition to that the thin-type fiberglass substrate can be easily deformed and wrapped, and the conventional substrate including fiberglass will increase the difficulty of processing for laser via so that it cannot fit the need of fine pitch therefore make the wiring more troublesome; and as the blind/buried vias in the aforesaid four-layered metal laminated structure are formed by the repetition of a laser via method, such repetition can be a complex and time consuming process and also the cost for fabricating the four-layered metal laminated structure can be costly. Therefore, the aforesaid conventional fiberglass substrate packaging structure does not have industrial advantages.